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IGBT | ||
Insulation Gate Bi-polar Transistor | ||
Wafer with Back Metal Plating | ||
Experimental use in Lab | ||
For optimizing heat dissipation | ||
EV (Electric Vehicle) and HEV (Hybrid Electric Vehicle) | ||
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Part Numbering System | |||||||||
TD | 1 | - | 12.5 | - | DC | - | BG150 | W | ### |
Wafer Material | Nbr Pads Per Die |
Die Size (mm) |
Patterns | Back Grind Die Thickness (µm) |
Packaging | ID Number |
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Si Silicon: TD = Single Die TDW = Sawn Wafer TDWU = Unsawn Wafer GaN Gallium Nitride: GaN = Single Die GaNW = Sawn wafer GaNWU = Unsawn wafer SiC Silicon Carbide: SiC = Single Die SiCW = Sawn wafer SiCWU = Unsawn wafer |
1~999 | Square Example 5.0 = 5.0x5.0mm 12.5 = 12.5x12.5mm Other sizes available Rectangular Example: 8x5= X8mm x Y5mm 5x8= X5mm x Y8mm Other sizes available |
DC = Daisy Chain BUS = Fully Plated ISO = Isolated Pads FA = Full Array Blank = Isolated or Fully Plated |
100µm ~500µm |
Single Die: W = 2" Waffle Pack P = 4" Waffle Pack T = JEDEC Tray E = Tape & Reel Unsawn Wafer: C = Cassette J = Jar/Canister Sawn Wafer: NT8 = Dicing Tape 8" Ring NT12 = Dicing Tape 12" Ring UV8 = UV Tape 8" Ring UV12 = UV Tape 12" Ring |
3~6 Digit Unique Number |
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Notes: Customer must complete questionnaire specifying wafer requirements such as: Wafer Material (Si, GaN or SiC), Wafer thickness (µm), Plating and Sputtering Alloys Plating Thickness, Back Grind Mesh Number, back-face laser annealing, etc | |||||||||
IGBT Wafer/Die Questionnaire | ||||||
Wafer Material: | [ ] Si Silicon |
[ ] GaN Gallium Nitride |
[ ] SiC Silicon Carbide |
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Die Size: | ________ mm x ________ mm |
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Die Thickness: | ________ µm | |||||
Back Grind Mesh: | [ ] #600 | Other ________ | ||||
Layer 1: (sputter) |
[ ] Ti | Other ________ | Layer 1 Thickness: |
[ ] 1000Å | Other ________ | |
Layer 2: (sputter) |
[ ] Ni | Other ________ | Layer 2 Thickness: |
[ ] 1000Å | Other ________ | |
Layer 3: (plating) |
[ ] Ni | Other ________ | Layer 3 Thickness: |
[ ] 2.0 ~ 5.0µm | Other ________ | |
Layer 4: (plating) |
[ ] Au [ ] Sn |
Other ________ | Layer 4 Thickness: |
[ ] 0.1 ~ 0.3µm | Other ________ | |
Wire Bond Pad: |
[ ] None | [ ] Daisy Chain | Pad size _____ x ______µm |
Nbr Pads ________ |
Pad Pitch ________ µm |
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Related Links: Wafer Test Die Dummy Die Flip Chip |
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